A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard
He, Xiaofeng; Zhu, Xi; Duan, Lian; Sun, Yichuang; Ma, Chengyan
Citation: He , X , Zhu , X , Duan , L , Sun , Y & Ma , C 2014 , ' A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard ' IEEE Transactions on Circuits and Systems II: Express Briefs , vol 61 , no. 10 , 2345303 , pp. 763-767 . DOI: 10.1109/TCSII.2014.2345303
The design of a 14-mW receiver without phase-locked loop for the Chinese electronic toll collection (ETC) system in a standard 0.18-μm CMOS process is presented in this brief. Since the previously published work was mainly based on vehicle-powered systems, low power consumption was not the primary goal of such a system. In contrast, the presented system is designed for a battery-powered system. Utilizing the presented receiver architecture, the entire receiver only consumes 7.8 mA, at the supply voltage of 1.8 V, which indicates a power saving of at least 38% compared with other state-of-the-art designs for the same application. To verify the performance, the bit error rate is measured to be better than 10-6, which well satisfies the Chinese ETC standard. Moreover, the sensitivity of the designed receiver can be readjusted to -50 dBm, which is required by the standard.
This is the accepted manuscript version of the following article: Xiaofeng He, et al., “A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard”, IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 61(10): 763-767, August 2014. The final published version is available at: http://ieeexplore.ieee.org/document/6871304/ © 2014 IEEE.
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