| dc.contributor.author | Xu, J. | |
| dc.contributor.author | Ariyaeeinia, A. | |
| dc.contributor.author | Sotudeh, R. | |
| dc.contributor.author | Ahmad, Z. | |
| dc.date.accessioned | 2007-10-04T10:55:36Z | |
| dc.date.available | 2007-10-04T10:55:36Z | |
| dc.date.issued | 2005 | |
| dc.identifier.citation | Xu , J , Ariyaeeinia , A , Sotudeh , R & Ahmad , Z 2005 , Pre-processing speech signals in FPGAs . in 6th Int Conf on ASIC 2005, ASICON 2005 2 . Institute of Electrical and Electronics Engineers (IEEE) , pp. 778-782 . https://doi.org/10.1109/ICASIC.2005.1611430 | |
| dc.identifier.other | dspace: 2299/846 | |
| dc.identifier.uri | http://hdl.handle.net/2299/846 | |
| dc.description | This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.---- Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. --Original article can be found at: http://ieeexplore.ieee.org/xpl/RecentCon.jsppunumber=10726 | |
| dc.description.abstract | Algorithms are traditionally developed on off-the-shelf digital signal processors. Recent silicon technology advance has made FPGAs feasible as an alternative solution. However, most of signal processing work in the past has been focused on implementing on software, which has led to a wide gap between algorithms and hardware. This paper is aimed to explore algorithm hardware-migration technologies, in particular, speech signal pre-processing algorithms into FPGAs. | en |
| dc.format.extent | 1577386 | |
| dc.language.iso | eng | |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
| dc.relation.ispartof | 6th Int Conf on ASIC 2005, ASICON 2005 2 | |
| dc.title | Pre-processing speech signals in FPGAs | en |
| dc.contributor.institution | School of Engineering and Technology | |
| dc.contributor.institution | Centre for Engineering Research | |
| dc.contributor.institution | Communications and Intelligent Systems | |
| dc.contributor.institution | Science & Technology Research Institute | |
| rioxxterms.versionofrecord | 10.1109/ICASIC.2005.1611430 | |
| rioxxterms.type | Other | |
| herts.preservation.rarelyaccessed | true | |
