Browsing by Author "Tenentes, Vasileios"

Now showing items 1-7 of 7

    • Aging Benefits in Nanometer CMOS Designs 

      Rossi, Daniele; Tenentes, Vasileios; Yang, Sheng; Khursheed, Saqib; Al-Hashimi, Bashir M. (2016-05-02)
      n this brief, we show that bias temperature instability (BTI) aging of MOS transistors, together with its detrimental effect for circuit performance and lifetime, presents considerable benefits for static power consumption ...

    • Coarse-grained Online Monitoring of BTI Aging by Reusing Power Gating Infrastructure 

      Tenentes, Vasileios; Rossi, Daniele; Yang, Sheng; Khursheed, Saqib; Al-Hashimi, Bashir M.; Gunn, Steve R. (2017-04-01)
      In this paper, we present a novel coarse-grained technique for monitoring online the bias temperature instability (BTI) aging of circuits by exploiting their power gating infrastructure. The proposed technique relies on ...

    • Exploiting Aging Benefits for the Design of Reliable Drowsy Cache Memories 

      Rossi, Daniele; Tenentes, Vasileios; Reddy, Sudhakar M.; Al-Hashimi, Bashir M.; Brown, Andrew (2017-07-19)
      In this paper, we show how beneficial effects of aging on static power consumption can be exploited to design reliable drowsy cache memories adopting dynamic voltage scaling (DVS) to reduce static power. First, we develop ...

    • The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology 

      Halak, Basel; Tenentes, Vasileios; Rossi, Daniele (2016-12-01)
      On-chip level shifters are the interface between parts of an Integrated Circuit (IC) that operate in different voltage levels. For this reason, they are indispensable blocks in Multi-Vdd System-on-Chips (SoCs). In this ...

    • Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs 

      Tenentes, Vasileios; Rossi, Daniele; Khursheed, Saqib; Al-Hashimi, Bashir M.; Chakrabarty, Krishnendu (2018-04-01)
      Manufacturing defects that do not affect the functional operation of low power integrated circuits (ICs) can nevertheless impact their power saving capability. We show that stuck-ON faults on the power switches and resistive ...

    • Reliable Power Gating With NBTI Aging Benefits 

      Rossi, Daniele; Tenentes, Vasileios; Yang, Sheng; Khursheed, Saqib; Al-Hashimi, Bashir M. (2016-02-15)
      In this paper, we show that negative bias temperature instability (NBTI) aging of sleep transistors (STs), together with its detrimental effect for circuit performance and lifetime (LT), presents considerable benefits for ...

    • Susceptible Workload Evaluation and Protection using Selective Fault Tolerance 

      Gutierrez, Mauricio D.; Tenentes, Vasileios; Rossi, Daniele; Kazmierski, Tom J. (2017-06-20)
      Low power fault tolerance design techniques trade reliability to reduce the area cost and the power overhead of integrated circuits by protecting only a subset of their workload or their most vulnerable parts. However, in ...