Real-time license plate localisation in FPGA.
Automatic Number Plate Recognition (ANPR) systems have become an important tool to track stolen car, access control and monitor the traffic. The fundamental requirements of an ANPR system are image capture using an ANPR camera, and processing of the captured image. The image processing part, which is a computationally intensive task, includes two stages i.e. plate localisation and character recognition. This paper presents an improved license plate localisation (LPL) algorithm based on modified Sobel vertical edge detection operator and two morphological operations suitable for FPGA implementation. The algorithm has been successfully implemented on a Xilinx Virtex-4 FPGA and tested using a database of 1000 images that contains UK number plates. It consumes 28% of the available on-chip resources, runs with a maximum frequency of 114.20 MHz, has a detection rate of 99.1% and capable of processing one image (640×480) in 3.8ms.