HARP: a VLIW RISC processor
View/ Open
Author
Findlay, P.
Trainis, S.A.
Steven, G.B.
Adams, R.G.
Attention
2299/1604
Abstract
HARP (The Hatfield Risc Processor) is a reduced instruction set processor being developed at Hatfield Polytechnic, UK. The major aim of the HARP project is to develop a VLIW (Very Long Instruction Word) RISC (Reduced Instruction Set Computer) processor capable of a sustained instruction execution rate in excess of one instruction per cycle by the parallel execution of RISC type instructions.