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dc.contributor.authorJiang, Meiqi
dc.contributor.authorSun, Jingru
dc.contributor.authorWang, Chunhua
dc.contributor.authorLiao, Ziyao
dc.contributor.authorSun, Yichuang
dc.contributor.authorHong , Qinghui
dc.contributor.authorZhang, Jiliang
dc.date.accessioned2023-10-19T08:45:01Z
dc.date.available2023-10-19T08:45:01Z
dc.date.issued2023-09-16
dc.identifier.citationJiang , M , Sun , J , Wang , C , Liao , Z , Sun , Y , Hong , Q & Zhang , J 2023 , ' An Efficient Memristive Alternating Crossbar Array and The Design of Full Adder ' , Nonlinear Dynamics . https://doi.org/10.1007/s11071-023-08887-9
dc.identifier.issn0924-090X
dc.identifier.urihttp://hdl.handle.net/2299/26950
dc.description© 2023, The Author(s), under exclusive licence to Springer Nature B.V. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1007/s11071-023-08887-9
dc.description.abstractMemristor is one of the most promising emerging technologies to solve the von Neumann bottleneck problem due to its non-volatile and binary characteristics. This paper studies the design method of high efficiency logic circuit based on memristor. First, a Multiple Input Multiple Output (MIMO) logic circuit de-sign scheme based on IMPLY and AND logic is proposed, which can derive multiple new efficient logic operation methods and complete complex logic with fewer steps and memristors. Second, in order to perform rapid interactive operations between different rows, an alternating crossbar array structure is designed which can quickly complete cross-row logic operations. Finally, a high-efficient Full Adder (FA) based on MIMO logic and alternating crossbar array is proposed. To accomplish32-bit add operation, the proposed FA needs 160memristors and only 41 steps. Compared with the state of art FA, our work has faster execution speed and fewer memristors.en
dc.format.extent901742
dc.language.isoeng
dc.relation.ispartofNonlinear Dynamics
dc.subjectCrossbar array
dc.subjectFull adder
dc.subjectIMPLY logic
dc.subjectMemristor
dc.subjectMulti-input logic
dc.subjectMulti-output logic
dc.subjectMechanical Engineering
dc.subjectAerospace Engineering
dc.subjectOcean Engineering
dc.subjectApplied Mathematics
dc.subjectElectrical and Electronic Engineering
dc.subjectControl and Systems Engineering
dc.titleAn Efficient Memristive Alternating Crossbar Array and The Design of Full Adderen
dc.contributor.institutionSchool of Physics, Engineering & Computer Science
dc.contributor.institutionDepartment of Engineering and Technology
dc.contributor.institutionCentre for Engineering Research
dc.contributor.institutionCentre for Future Societies Research
dc.contributor.institutionCommunications and Intelligent Systems
dc.description.statusPeer reviewed
dc.date.embargoedUntil2024-09-16
dc.identifier.urlhttp://www.scopus.com/inward/record.url?scp=85171376165&partnerID=8YFLogxK
rioxxterms.versionofrecord10.1007/s11071-023-08887-9
rioxxterms.typeJournal Article/Review
herts.preservation.rarelyaccessedtrue


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