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    • Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST 

      Omana, Martin; Rossi, Daniele; Fuzzi, Filippo; Metra, Cecilia; Tirumurti, Chandra; Galivanche, Rajesh (2017-01-31)
      The generation of significant power droop (PD) during at-speed test performed by Logic Built-In Self Test (LBIST) is a serious concern for modern ICs. In fact, the PD originated during test may delay signal transitions of ...