Browsing by Author "Potter, R."

Now showing items 1-4 of 4

    • Adding static data dependence collapsing to a high-performance instruction scheduler 

      Steven, F.L.; Egan, C.; Potter, R.; Steven, G.B. (2001)
      State-of-the-art processors achieve high performance by executing multiple instructions in parallel. However, the parallel execution of instructions is ultimately limited by true data dependencies between individual ...

    • An introduction to the Hatfield superscalar architecture 

      Steven, G.B.; Christianson, B.; Collins, R.; Potter, R.; Steven, F.L. (University of Hertfordshire, 1996)
      If a high-performance superscalar processor is to realise its full potential, the complier must re-order or schedule the object code at compile time. This scheduling creates groups of adjacent instructions that are independent ...

    • Investigating the limits of instruction level parallelism 

      Potter, R. (University of Hertfordshire, 1996)
      High performance computer architectures increasingly use compile-time instruction scheduling to reorder code to expose parallelism that can be exploited at run-time. Although respectable performance increases have been ...

    • A superscalar architecture to exploit instruction level parallelism 

      Steven, G.B.; Christianson, B.; Collins, R.; Steven, F.L.; Potter, R. (1997-03-17)
      If a high-performance superscalar processor is to realise its full potential, the compiler must re-order or schedule the object code at compile time. This scheduling creates groups of adjacent instructions that are independent ...