Show simple item record

dc.contributor.authorHicks, M.en_US
dc.contributor.authorEgan, C.en_US
dc.contributor.authorChristianson, B.en_US
dc.contributor.authorQuick, P.en_US
dc.date.accessioned2007-10-29T12:07:09Z
dc.date.available2007-10-29T12:07:09Z
dc.date.issued2007en_US
dc.identifier.citationIn: Procs of the Int Conf on Design and Technology of Integrated Systems in Nanoscale Era (DTIS07)en_US
dc.identifier.other901114en_US
dc.identifier.urihttp://hdl.handle.net/2299/1005
dc.description.abstractDynamic branch predictors account for between 10% and 40% of a processor’s dynamic power consumption. This power cost is proportional to the number of accesses made to that dynamic predictor during a program’s execution. In this paper we propose the combined use of local delay region scheduling and profiling with an original adaptive branch bias measurement. The adaptive branch bias measurement takes note of the dynamic predictor’s accuracy for a given branch and decides whether or not to assign a static prediction for that branch. The static prediction and local delay region scheduling information is represented as two hint bits in branch instructions. We show that, with the combined use of these two methods, the number of dynamic branch predictor accesses/updates can be reduced by up to 62%. The associated average power saving is very encouraging; for the example high-performance embedded architecture n average global processor power saving of 6.22% is achieved.en
dc.format.extent89839 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.titleTowards an Energy Efficient Branch Prediction Scheme Using Profiling, Adaptive Bias Measurement and Delay Region Scheduling.en_US
dc.typeConference paperen_US
herts.preservation.rarelyaccessedtrue


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record