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dc.contributor.authorFindlay, P.
dc.contributor.authorTrainis, S.A.
dc.contributor.authorSteven, G.B.
dc.contributor.authorAdams, R.G.
dc.date.accessioned2008-02-12T16:38:23Z
dc.date.available2008-02-12T16:38:23Z
dc.date.issued1991
dc.identifier.citationFindlay , P , Trainis , S A , Steven , G B & Adams , R G 1991 , HARP: a VLIW RISC processor . in In: Procs of 5th Annual European Computer Conference, CompEuro'91 . IEEE , pp. 368-372 . https://doi.org/10.1109/CMPEUR.1991.257412
dc.identifier.isbn0-8186-2141-9
dc.identifier.otherPURE: 93536
dc.identifier.otherPURE UUID: 17be7a13-535b-4284-a399-e5a897eaa259
dc.identifier.otherdspace: 2299/1604
dc.identifier.otherScopus: 0026407866
dc.identifier.urihttp://hdl.handle.net/2299/1604
dc.descriptionThis material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.---- Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. DOI : 10.1109/CMPEUR.1991.257412
dc.description.abstractHARP (The Hatfield Risc Processor) is a reduced instruction set processor being developed at Hatfield Polytechnic, UK. The major aim of the HARP project is to develop a VLIW (Very Long Instruction Word) RISC (Reduced Instruction Set Computer) processor capable of a sustained instruction execution rate in excess of one instruction per cycle by the parallel execution of RISC type instructions.en
dc.language.isoeng
dc.publisherIEEE
dc.relation.ispartofIn: Procs of 5th Annual European Computer Conference, CompEuro'91
dc.rights/dk/atira/pure/core/openaccesspermission/open
dc.titleHARP: a VLIW RISC processoren
dc.contributor.institutionSchool of Computer Science
dc.relation.schoolSchool of Computer Science
rioxxterms.versionofrecordhttps://doi.org/10.1109/CMPEUR.1991.257412
rioxxterms.typeOther
herts.preservation.rarelyaccessedtrue
herts.rights.accesstyperestrictedAccess


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