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dc.contributor.authorHe, Xiaofeng
dc.contributor.authorZhu, Xi
dc.contributor.authorDuan, Lian
dc.contributor.authorSun, Yichuang
dc.contributor.authorMa, Chengyan
dc.date.accessioned2019-02-20T11:50:29Z
dc.date.available2019-02-20T11:50:29Z
dc.date.issued2014-10-01
dc.identifier.citationHe , X , Zhu , X , Duan , L , Sun , Y & Ma , C 2014 , ' A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard ' , IEEE Transactions on Circuits and Systems II: Express Briefs , vol. 61 , no. 10 , 2345303 , pp. 763-767 . https://doi.org/10.1109/TCSII.2014.2345303
dc.identifier.issn1549-7747
dc.identifier.otherPURE: 11255505
dc.identifier.otherPURE UUID: b7aff081-445f-4b0e-a316-611a721330cc
dc.identifier.otherScopus: 84907997815
dc.identifier.urihttp://hdl.handle.net/2299/21118
dc.descriptionThis is the accepted manuscript version of the following article: Xiaofeng He, et al., “A 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standard”, IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 61(10): 763-767, August 2014. The final published version is available at: http://ieeexplore.ieee.org/document/6871304/ © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
dc.description.abstractThe design of a 14-mW receiver without phase-locked loop for the Chinese electronic toll collection (ETC) system in a standard 0.18-μm CMOS process is presented in this brief. Since the previously published work was mainly based on vehicle-powered systems, low power consumption was not the primary goal of such a system. In contrast, the presented system is designed for a battery-powered system. Utilizing the presented receiver architecture, the entire receiver only consumes 7.8 mA, at the supply voltage of 1.8 V, which indicates a power saving of at least 38% compared with other state-of-the-art designs for the same application. To verify the performance, the bit error rate is measured to be better than 10-6, which well satisfies the Chinese ETC standard. Moreover, the sensitivity of the designed receiver can be readjusted to -50 dBm, which is required by the standard.en
dc.format.extent5
dc.language.isoeng
dc.relation.ispartofIEEE Transactions on Circuits and Systems II: Express Briefs
dc.rights/dk/atira/pure/core/openaccesspermission/open
dc.subjectAmplitude-shift keying (ASK) demodulator
dc.subjectElectronic toll collection (ETC)
dc.subjectIntelligent transportation system (ITS)
dc.subjectElectrical and Electronic Engineering
dc.titleA 14-mW PLL-less receiver in 0.18-μm CMOS for Chinese electronic toll collection standarden
dc.contributor.institutionSmart Electronics Devices and Networks
dc.contributor.institutionRadio and Mobile Communication Systems
dc.contributor.institutionCentre for Engineering Research
dc.contributor.institutionSchool of Engineering and Technology
dc.contributor.institutionUniversity of Hertfordshire
dc.description.statusPeer reviewed
dc.identifier.urlhttp://www.scopus.com/inward/record.url?scp=84907997815&partnerID=8YFLogxK
dc.relation.schoolSchool of Engineering and Technology
dc.description.versiontypeFinal Accepted Version
rioxxterms.versionAM
rioxxterms.versionofrecordhttps://doi.org/10.1109/TCSII.2014.2345303
rioxxterms.typeJournal Article/Review
herts.preservation.rarelyaccessedtrue
herts.rights.accesstypeopenAccess


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