Show simple item record

dc.contributor.authorZhang, Xinwang
dc.contributor.authorChen, Zipeng
dc.contributor.authorGao, Yanqiang
dc.contributor.authorXu, Yang
dc.contributor.authorLiu, Bingqiao
dc.contributor.authorYu, Qian
dc.contributor.authorSun, Yichuang
dc.contributor.authorWang, Zhihua
dc.contributor.authorChi, Baoyong
dc.date.accessioned2019-02-21T15:00:55Z
dc.date.available2019-02-21T15:00:55Z
dc.date.issued2018-02-01
dc.identifier.citationZhang , X , Chen , Z , Gao , Y , Xu , Y , Liu , B , Yu , Q , Sun , Y , Wang , Z & Chi , B 2018 , ' A 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS ' , Microelectronics Journal , vol. 72 , pp. 58-73 . https://doi.org/10.1016/j.mejo.2017.12.007
dc.identifier.issn0026-2692
dc.identifier.otherPURE: 13222432
dc.identifier.otherPURE UUID: d96a6c8d-1e02-46a9-ae00-9deae245738f
dc.identifier.otherScopus: 85038845659
dc.identifier.urihttp://hdl.handle.net/2299/21139
dc.description© 2017 Elsevier Ltd. All rights reserved.
dc.description.abstractA 0.1–5.0 GHz flexible software-defined radio (SDR) receiver with digitally assisted calibration is presented, employing a zero-IF/low-IF reconfigurable architecture for both wideband and narrowband applications. The receiver composes of a main-path based on a current-mode mixer for low noise, a high linearity sub-path based on a voltage-mode passive mixer for out-of-band rejection, and a harmonic rejection (HR) path with vector gain calibration. A dual feedback LNA with “8” shape nested inductor structure, a cascode inverter-based TCA with miller feedback compensation, and a class-AB full differential Op-Amp with Miller feed-forward compensation and QFG technique are proposed. Digitally assisted calibration methods for HR, IIP2 and image rejection (IR) are presented to maintain high performance over PVT variations. The presented receiver is implemented in 65 nm CMOS with 5.4 mm2 core area, consuming 9.6–47.4 mA current under 1.2 V supply. The receiver main path is measured with +5 dB m/+5dBm IB-IIP3/OB-IIP3 and +61dBm IIP2. The sub-path achieves +10 dB m/+18dBm IB-IIP3/OB-IIP3 and +62dBm IIP2, as well as 10 dB RF filtering rejection at 10 MHz offset. The HR-path reaches +13 dB m/+14dBm IB-IIP3/OB-IIP3 and 62/66 dB 3rd/5th-order harmonic rejection with 30–40 dB improvement by the calibration. The measured sensitivity satisfies the requirements of DVB-H, LTE, 802.11 g, and ZigBee.en
dc.format.extent16
dc.language.isoeng
dc.relation.ispartofMicroelectronics Journal
dc.rightsEmbargoed
dc.subjectCMOS
dc.subjectDigitally-assisted calibration
dc.subjectLow noise amplifier
dc.subjectRF
dc.subjectSoft-defined radio
dc.subjectWireless receiver
dc.subjectElectronic, Optical and Magnetic Materials
dc.subjectAtomic and Molecular Physics, and Optics
dc.subjectCondensed Matter Physics
dc.subjectSurfaces, Coatings and Films
dc.subjectElectrical and Electronic Engineering
dc.titleA 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOSen
dc.contributor.institutionCentre for Engineering Research
dc.contributor.institutionSchool of Engineering and Technology
dc.contributor.institutionCommunications and Intelligent Systems
dc.description.statusPeer reviewed
dc.date.embargoedUntil2019-07-04
dc.identifier.urlhttp://www.scopus.com/inward/record.url?scp=85038845659&partnerID=8YFLogxK
dc.relation.schoolSchool of Engineering and Technology
dc.description.versiontypeFinal Accepted Version
dcterms.dateAccepted2018-02-01
rioxxterms.versionAM
rioxxterms.versionofrecordhttps://doi.org/10.1016/j.mejo.2017.12.007
rioxxterms.licenseref.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/
rioxxterms.licenseref.startdate2019-07-04
rioxxterms.typeJournal Article/Review
herts.preservation.rarelyaccessedtrue
herts.date.embargo2019-07-04
herts.rights.accesstypeEmbargoed


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record