dc.contributor.author | Ma, Minglin | |
dc.contributor.author | Cai, Xinglong | |
dc.contributor.author | Jiang, Jin | |
dc.contributor.author | Sun, Yichuang | |
dc.date.accessioned | 2019-03-15T15:08:29Z | |
dc.date.available | 2019-03-15T15:08:29Z | |
dc.date.issued | 2018-12-01 | |
dc.identifier.citation | Ma , M , Cai , X , Jiang , J & Sun , Y 2018 , ' High Efficiency Cross-Coupled Charge Pump Circuit with Four-Clock Signals ' , Radioelectronics and Communications Systems , vol. 61 , no. 12 , pp. 565-570 . https://doi.org/10.3103/S073527271812004X | |
dc.identifier.issn | 0735-2727 | |
dc.identifier.uri | http://hdl.handle.net/2299/21201 | |
dc.description | © Allerton Press, Inc. 2018 | |
dc.description.abstract | A fully integrated cross-coupled charge pump circuit for boosting dc-to-dc converter applications with four-clock signals has been proposed. With the new clock scheme, this charge pump eliminates all of the reversion power loss and reduces the ripple voltage. In addition, the largest voltage differences between the terminals of all transistors do not exceed the power supply voltage for solving the gate-oxide overstress problem in the conventional charge pump circuits and enhancing the reliability. This proposed charge pump circuit does not require any extra level shifter; therefore, the power efficiency is increased. The proposed charge pump circuit has been simulated using Spectre in the TSMC 0.18 μm CMOS process. The simulation results show that the maximum voltage conversion efficiency of the new 3-stage cross-coupled circuit with an input voltage of 1.5Vis 99.8%. According to the comparison results of the conventional pump and the enhanced charge pump proposed, the output ripple voltage has been significantly reduced. | en |
dc.format.extent | 6 | |
dc.format.extent | 442739 | |
dc.language.iso | eng | |
dc.relation.ispartof | Radioelectronics and Communications Systems | |
dc.subject | Electrical and Electronic Engineering | |
dc.title | High Efficiency Cross-Coupled Charge Pump Circuit with Four-Clock Signals | en |
dc.contributor.institution | Communications and Intelligent Systems | |
dc.contributor.institution | Centre for Engineering Research | |
dc.contributor.institution | School of Physics, Engineering & Computer Science | |
dc.contributor.institution | Department of Engineering and Technology | |
dc.contributor.institution | Centre for Future Societies Research | |
dc.description.status | Peer reviewed | |
dc.identifier.url | http://www.scopus.com/inward/record.url?scp=85062079588&partnerID=8YFLogxK | |
rioxxterms.versionofrecord | 10.3103/S073527271812004X | |
rioxxterms.type | Journal Article/Review | |
herts.preservation.rarelyaccessed | true | |