dc.contributor.author | Zhang, Xin | |
dc.contributor.author | Wang, Chunhua | |
dc.contributor.author | Sun, Yichuang | |
dc.contributor.author | Peng, Haijun | |
dc.date.accessioned | 2020-03-27T01:06:31Z | |
dc.date.available | 2020-03-27T01:06:31Z | |
dc.date.issued | 2018-03 | |
dc.identifier.citation | Zhang , X , Wang , C , Sun , Y & Peng , H 2018 , ' A Novel High Linearity and Low Power Folded CMOS LNA for UWB Receivers ' , Journal of Circuits, Systems and Computers , vol. 27 , no. 3 , 1850047 . https://doi.org/10.1142/S0218126618500470 | |
dc.identifier.issn | 0218-1266 | |
dc.identifier.uri | http://hdl.handle.net/2299/22510 | |
dc.description | © 2017 World Scientific Publishing Company. Electronic version of an article published as Journal of Circuits, Systems and Computers, Vol. 27, No. 03, 1850047, https://doi.org/10.1142/S0218126618500470. | |
dc.description.abstract | This paper presents a high linearity and low power Low-Noise Amplifier (LNA) for Ultra-Wideband (UWB) receivers based on CHRT 0.18μm CMOS technology. In this work, the folded topology is adopted in order to reduce the supply voltage and power consumption. Moreover, a band-pass LC filter is embedded in the folded-cascode circuit to extend bandwidth. The transconductance nonlinearity has a great impact on the whole LNA linearity performance under a low supply voltage. A post-distortion (PD) technique employing an auxiliary transistor is applied in the transconductance stage to improve the linearity. The post-layout simulation results indicate that the proposed LNA achieves a maximum power gain of 12.8dB. The input and output reflection coefficients both are lower than -10.0dB over 2.5~11.5GHz. The input third-order intercept point (IIP3) is 5.6dBm at 8GHz and the noise figure (NF) is lower than 4.0dB. The LNA consumes 5.4mW power under a 1V supply voltage. | en |
dc.format.extent | 19 | |
dc.format.extent | 1268041 | |
dc.language.iso | eng | |
dc.relation.ispartof | Journal of Circuits, Systems and Computers | |
dc.title | A Novel High Linearity and Low Power Folded CMOS LNA for UWB Receivers | en |
dc.contributor.institution | Centre for Engineering Research | |
dc.contributor.institution | School of Engineering and Technology | |
dc.contributor.institution | Communications and Intelligent Systems | |
dc.description.status | Peer reviewed | |
dc.date.embargoedUntil | 2018-07-13 | |
rioxxterms.versionofrecord | 10.1142/S0218126618500470 | |
rioxxterms.type | Journal Article/Review | |
herts.preservation.rarelyaccessed | true | |