dc.contributor.author | Chen, Lang | |
dc.contributor.author | Chen, Lisheng | |
dc.contributor.author | Ge, Zeyu | |
dc.contributor.author | Sun, Yichuang | |
dc.contributor.author | Zhu, Xi | |
dc.date.accessioned | 2023-06-15T15:00:01Z | |
dc.date.available | 2023-06-15T15:00:01Z | |
dc.date.issued | 2023-06-08 | |
dc.identifier.citation | Chen , L , Chen , L , Ge , Z , Sun , Y & Zhu , X 2023 , ' A 40-GHz Load Modulated Balanced Power Amplifier using Unequal Power Splitter and Phase Compensation Network in 45-nm SOI CMOS ' , IEEE Transactions on Circuits and Systems I: Regular Papers . https://doi.org/10.1109/TCSI.2023.3282731 | |
dc.identifier.issn | 1549-8328 | |
dc.identifier.uri | http://hdl.handle.net/2299/26434 | |
dc.description | © 2023 IEEE - All rights reserved. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1109/TCSI.2023.3282731 | |
dc.description.abstract | In this work, a ten-way power-combined poweramplifier is designed using a load modulated balanced amplifier(LMBA)-based architecture. To provide the required magnitudeand phase controls between the main and control-signal paths ofthe LMBA, an unequal power splitter and a phase compensationnetwork are proposed. As proof of concept, the designed poweramplifier is implemented in a 45-nm SOI CMOS process. At 40GHz, it delivers a 25.1 dBm Psat with a peak power-addedefficiency (PAE) of 27.9%. At 6-dB power back-off level, itachieves 1.39 times drain efficiency enhancement over an idealClass-B power amplifier. Using a 200-MHz single-carrier 64-QAMsignal, the designed amplifier delivers an average output power of16.5 dBm with a PAE of 13.1% at an EVMrms of -23.9 dB andACPR of -25.3 dBc. The die size, including all testing pads, is only1.92 mm2. To the best of the authors’ knowledge, compared withthe other recently published silicon-based LMBAs, this designachieves the highest Psat. | en |
dc.format.extent | 9 | |
dc.format.extent | 3489596 | |
dc.language.iso | eng | |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems I: Regular Papers | |
dc.title | A 40-GHz Load Modulated Balanced Power Amplifier using Unequal Power Splitter and Phase Compensation Network in 45-nm SOI CMOS | en |
dc.contributor.institution | School of Physics, Engineering & Computer Science | |
dc.contributor.institution | Department of Engineering and Technology | |
dc.contributor.institution | Centre for Engineering Research | |
dc.contributor.institution | Centre for Future Societies Research | |
dc.contributor.institution | Communications and Intelligent Systems | |
dc.description.status | Peer reviewed | |
rioxxterms.versionofrecord | 10.1109/TCSI.2023.3282731 | |
rioxxterms.type | Journal Article/Review | |
herts.preservation.rarelyaccessed | true | |