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dc.contributor.authorSlaney , Andrew
dc.contributor.authorSun, Yichuang
dc.contributor.authorSimpson, Oluyomi
dc.date.accessioned2023-11-02T10:00:02Z
dc.date.available2023-11-02T10:00:02Z
dc.date.issued2022-12-12
dc.identifier.citationSlaney , A , Sun , Y & Simpson , O 2022 , An Efficient Low Cost FPGA MIMO Channel Model . in 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) . Institute of Electrical and Electronics Engineers (IEEE) , Glasgow, United Kingdom , 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) , Glasgow , United Kingdom , 24/10/22 . https://doi.org/10.1109/ICECS202256217.2022.9970872
dc.identifier.citationconference
dc.identifier.isbn978-1-6654-8824-2
dc.identifier.isbn978-1-6654-8823-5
dc.identifier.urihttp://hdl.handle.net/2299/27061
dc.description© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. This is the accepted manuscript version of a conference paper which has been published in final form at https://doi.org/10.1109/ICECS202256217.2022.9970872
dc.description.abstractIn this paper, a mathematical model for generating AWGN and Rayleigh fading is presented and argued based around the generation of Gaussian distributed numbers. This paper is focused on a multiple input multiple output (MIMO) channel model for the design and implementation of space-time coded MIMO modem systems such that the complexity of the design is as much as possible pushed into the digital domain and that the architecture is computationally efficient, driving the emphasis and complexity of implementation into software. We present an FPGA architecture to yield a Rayleigh fading and AWGN model for MIMO systems requiring up to four transmit and two receive antennas while requiring only a slight increase in logic resource over a single input single output model. The design entry was in VHDL and the target FPGA was the Xilinx Spartan 3 XC3S4000en
dc.format.extent5
dc.format.extent254303
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.ispartof2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
dc.titleAn Efficient Low Cost FPGA MIMO Channel Modelen
dc.contributor.institutionCentre for Future Societies Research
dc.contributor.institutionSchool of Physics, Engineering & Computer Science
dc.contributor.institutionDepartment of Engineering and Technology
dc.contributor.institutionCommunications and Intelligent Systems
dc.contributor.institutionCentre for Engineering Research
dc.date.embargoedUntil2022-10-19
rioxxterms.versionofrecord10.1109/ICECS202256217.2022.9970872
rioxxterms.typeOther
herts.preservation.rarelyaccessedtrue


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