| dc.contributor.author | Glinianowicz, J. | |
| dc.contributor.author | Jakusz, J. | |
| dc.contributor.author | Szczepanski, S. | |
| dc.contributor.author | Sun, Y. | |
| dc.date.accessioned | 2010-07-05T13:33:21Z | |
| dc.date.available | 2010-07-05T13:33:21Z | |
| dc.date.issued | 2000 | |
| dc.identifier.citation | Glinianowicz , J , Jakusz , J , Szczepanski , S & Sun , Y 2000 , ' High-frequency two-input CMOS OTA for continuous-time filter applications ' , IEE Proceedings Circuits Devices and Systems , vol. 147 , no. 1 , pp. 13-18 . https://doi.org/10.1049/ip-cds:20000317 | |
| dc.identifier.issn | 1350-2409 | |
| dc.identifier.other | dspace: 2299/4623 | |
| dc.identifier.uri | http://hdl.handle.net/2299/4623 | |
| dc.description | “This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.” | |
| dc.description.abstract | A high-frequency fully differential CMOS operational transconductance amplifier (OTA) is presented for continuous-time filter applications in the megahertz range. The proposed design technique combines a linear cross-coupled quad input stage with an enhanced folded-cascode circuit to increase the output resistance of the amplifier. SPICE simulations show that DC-gain enhancement can be obtained without significant bandwidth limitation. The two-input OTA developed is used in high-frequency tuneable filter design based on IFLF and LC ladder simulation structures. Simulated results of parameters and characteristics of the OTA and filters in a standard 1.2 μm CMOS process (MOSIS) are presented. A tuning circuit is also discussed. | en |
| dc.format.extent | 502004 | |
| dc.language.iso | eng | |
| dc.relation.ispartof | IEE Proceedings Circuits Devices and Systems | |
| dc.title | High-frequency two-input CMOS OTA for continuous-time filter applications | en |
| dc.contributor.institution | School of Engineering and Technology | |
| dc.contributor.institution | School of Physics, Engineering & Computer Science | |
| dc.contributor.institution | Department of Engineering and Technology | |
| dc.contributor.institution | Centre for Engineering Research | |
| dc.contributor.institution | Communications and Intelligent Systems | |
| dc.description.status | Peer reviewed | |
| rioxxterms.versionofrecord | 10.1049/ip-cds:20000317 | |
| rioxxterms.type | Journal Article/Review | |
| herts.preservation.rarelyaccessed | true | |
