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dc.contributor.authorZhu, X.
dc.contributor.authorSun, Y.
dc.contributor.authorMoritz, J.
dc.date.accessioned2010-08-11T13:18:41Z
dc.date.available2010-08-11T13:18:41Z
dc.date.issued2007
dc.identifier.citationZhu , X , Sun , Y & Moritz , J 2007 , A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost . in 50th Midwest Symposium on Circuits and Systems, MWSCAS 2007 . IEEE , pp. 1517-1520 . https://doi.org/10.1109/MWSCAS.2007.4488828
dc.identifier.isbn978-1-4244-1175-7
dc.identifier.otherPURE: 111724
dc.identifier.otherPURE UUID: 68738909-6287-4e08-a66e-61f2da6149f5
dc.identifier.otherdspace: 2299/4747
dc.identifier.otherScopus: 51449088424
dc.identifier.urihttp://hdl.handle.net/2299/4747
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dc.description.abstractThe design and implementation of a CMOS continuous-time follow-the-leader-feedback (FLF) filter is described. The filter is implemented using a fully-differential linear, low voltage and low power consumption operational transconductance amplifier (OTA) based on a source degeneration topology. PSpice simulations using a standard TSMC 0.18 mum CMOS process with 2 V power supply have shown that the cut-off frequency of the filter ranges from 55 MHz to 160 MHz and dynamic range is about 45 dB. The group delay is less than 5% over the whole tuning range; the power consumption is only 9 mW.en
dc.language.isoeng
dc.publisherIEEE
dc.relation.ispartof50th Midwest Symposium on Circuits and Systems, MWSCAS 2007
dc.titleA 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boosten
dc.contributor.institutionSchool of Engineering and Technology
dc.contributor.institutionScience & Technology Research Institute
rioxxterms.versionofrecordhttps://doi.org/10.1109/MWSCAS.2007.4488828
rioxxterms.typeOther
herts.preservation.rarelyaccessedtrue


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