dc.contributor.author | Zhu, X. | |
dc.contributor.author | Sun, Y. | |
dc.contributor.author | Moritz, J. | |
dc.date.accessioned | 2010-08-11T13:18:41Z | |
dc.date.available | 2010-08-11T13:18:41Z | |
dc.date.issued | 2007 | |
dc.identifier.citation | Zhu , X , Sun , Y & Moritz , J 2007 , A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost . in 50th Midwest Symposium on Circuits and Systems, MWSCAS 2007 . Institute of Electrical and Electronics Engineers (IEEE) , pp. 1517-1520 . https://doi.org/10.1109/MWSCAS.2007.4488828 | |
dc.identifier.isbn | 978-1-4244-1175-7 | |
dc.identifier.other | dspace: 2299/4747 | |
dc.identifier.uri | http://hdl.handle.net/2299/4747 | |
dc.description | “This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.” | |
dc.description.abstract | The design and implementation of a CMOS continuous-time follow-the-leader-feedback (FLF) filter is described. The filter is implemented using a fully-differential linear, low voltage and low power consumption operational transconductance amplifier (OTA) based on a source degeneration topology. PSpice simulations using a standard TSMC 0.18 mum CMOS process with 2 V power supply have shown that the cut-off frequency of the filter ranges from 55 MHz to 160 MHz and dynamic range is about 45 dB. The group delay is less than 5% over the whole tuning range; the power consumption is only 9 mW. | en |
dc.format.extent | 446274 | |
dc.language.iso | eng | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
dc.relation.ispartof | 50th Midwest Symposium on Circuits and Systems, MWSCAS 2007 | |
dc.title | A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost | en |
dc.contributor.institution | School of Engineering and Technology | |
dc.contributor.institution | Science & Technology Research Institute | |
dc.contributor.institution | School of Physics, Engineering & Computer Science | |
dc.contributor.institution | Department of Engineering and Technology | |
dc.contributor.institution | Centre for Engineering Research | |
dc.contributor.institution | Centre for Future Societies Research | |
dc.contributor.institution | Communications and Intelligent Systems | |
rioxxterms.versionofrecord | 10.1109/MWSCAS.2007.4488828 | |
rioxxterms.type | Other | |
herts.preservation.rarelyaccessed | true | |