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dc.contributor.authorDeng, Y.
dc.contributor.authorHe, Y.
dc.contributor.authorSun, Y.
dc.date.accessioned2010-08-12T13:44:07Z
dc.date.available2010-08-12T13:44:07Z
dc.date.issued2000
dc.identifier.citationDeng , Y , He , Y & Sun , Y 2000 , Fault diagnosis of analog circuits with tolerances using artificial neural networks . in In: Procs of IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2000 . Institute of Electrical and Electronics Engineers (IEEE) , pp. 292-295 . https://doi.org/10.1109/APCCAS.2000.913491
dc.identifier.isbn0-7803-6253-5
dc.identifier.otherPURE: 113171
dc.identifier.otherPURE UUID: befd97ec-fe20-4ebf-ad9f-fafb92ca3425
dc.identifier.otherdspace: 2299/4770
dc.identifier.otherScopus: 0009600350
dc.identifier.urihttp://hdl.handle.net/2299/4770
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dc.description.abstractThis paper proposes a method for analog fault diagnosis using neural networks. The primary focus of the paper is to provide robust diagnosis using a mechanism to deal with the problem of component tolerances and reduce testing time. The proposed approach is based on the k-fault diagnosis method and artificial backward propagation neural network. Simulation results show that the method is robust and fast for fault diagnosis of analog circuits with tolerances.en
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.relation.ispartofIn: Procs of IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2000
dc.titleFault diagnosis of analog circuits with tolerances using artificial neural networksen
dc.contributor.institutionSchool of Engineering and Technology
dc.contributor.institutionSchool of Physics, Engineering & Computer Science
dc.contributor.institutionDepartment of Engineering and Technology
dc.contributor.institutionCentre for Engineering Research
dc.contributor.institutionCommunications and Intelligent Systems
rioxxterms.versionofrecordhttps://doi.org/10.1109/APCCAS.2000.913491
rioxxterms.typeOther
herts.preservation.rarelyaccessedtrue


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