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dc.contributor.authorGrelck, C.
dc.contributor.authorJulku, J.
dc.contributor.authorPenczek, F.
dc.date.accessioned2011-03-15T11:40:54Z
dc.date.available2011-03-15T11:40:54Z
dc.date.issued2010
dc.identifier.citationGrelck , C , Julku , J & Penczek , F 2010 , S-Net for multi-memory multicores . in Proceedings of the 5th ACM SIGPLAN Workshop on Declarative Aspects of Multicore Programming [DAMP'10] . ACM Press , pp. 25-34 . https://doi.org/10.1145/1708046.1708054
dc.identifier.isbn978-1-60558-859-9
dc.identifier.otherdspace: 2299/5471
dc.identifier.urihttp://hdl.handle.net/2299/5471
dc.descriptionCopyright ACM, 2010. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in Proceedings of the 5th ACM SIGPLAN Workshop on Declarative Aspects of Multicore Programming: http://doi.acm.org/10.1145/1708046.1708054
dc.description.abstractS-Net is a declarative coordination language and component technology aimed at modern multi-core/many-core architectures and systems-on-chip. It builds on the concept of stream processing to structure dynamically evolving networks of communicating asynchronous components. Components themselves are implemented using a conventional language suitable for the application domain. This two-level software architecture maintains a familiar sequential development environment for large parts of an application and offers a high-level declarative approach to component coordination. In this paper we present a conservative language extension for the placement of components and component networks in a multi-memory environment, i.e. architectures that associate individual compute cores or groups thereof with private memories. We describe a novel distributed runtime system layer that complements our existing multithreaded runtime system for shared memory multicores. Particular emphasis is put on efficient management of data communication. Last not least, we present preliminary experimental data.en
dc.format.extent280533
dc.language.isoeng
dc.publisherACM Press
dc.relation.ispartofProceedings of the 5th ACM SIGPLAN Workshop on Declarative Aspects of Multicore Programming [DAMP'10]
dc.titleS-Net for multi-memory multicoresen
dc.contributor.institutionSchool of Computer Science
rioxxterms.versionofrecord10.1145/1708046.1708054
rioxxterms.typeOther
herts.preservation.rarelyaccessedtrue


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