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An evaluation of the iHARP multiple instruction issue processor
(University of Hertfordshire, 1994)
RISC processors have approached an execution rate of one instruction per cycle by using pipelining to speed up execution. However, to achieve an execution rate of more than one instruction per cycle, processors must issue ...
Using a resource limited instruction scheduler to evaluate the iHARP processor
(University of Hertfordshire, 1994)
RISC processors have approached an execution rate of one instruction per cycle by using pipelining to speed up execution. However, to achieve an execution rate of more than one instruction per cycle, processors must issue ...