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HARP: a statically scheduled multiple-instruction-issue architecture and its compiler
(University of Hertfordshire, 1994)
This paper presents the results of an investigation into the performance of a new statically scheduled multiple-instruction-issue architecture and its compiler. HARP is a Long Instruction Word Architecture developed in ...
Using conditional execution to exploit instruction level concurrency
(University of Hertfordshire, 1994)
Multiple-instruction-issue processors seek to improve performance over scalar RISC processors by providing multiple pipelined functional units in order to fetch, decode and execute several instructions per cycle. The process ...
Static Instruction Scheduling for the HARP Multiple-Instruction-Issue Architecture
(1993)
HARP is a new multiple-instruction-issue architecture developed at the University of Hertfordshire. This paper describes the essential features of the HARP machine model and presents two compile-time scheduling techniques, ...
Static instruction scheduling for the HARP multiple-instruction-issue architecture
(University of Hertfordshire, 1992)
HARP is a new multiple-instruction-issue architecture developed at the University of Hertfordshire. This paper describes the essential features of the HARP machine model and presents two compile-time scheduling techniques, ...