| dc.contributor.author | Kirner, Raimund | |
| dc.contributor.author | Puschner, Peter | |
| dc.contributor.editor | DeMiguel, M | |
| dc.contributor.editor | Kalogeraki, V | |
| dc.contributor.editor | Kim, DH | |
| dc.date.accessioned | 2011-08-17T09:01:17Z | |
| dc.date.available | 2011-08-17T09:01:17Z | |
| dc.date.issued | 2007 | |
| dc.identifier.citation | Kirner , R & Puschner , P 2007 , Time-predictable task preemption for real-time systems with direct-mapped instruction cache . in M DeMiguel , V Kalogeraki & DH Kim (eds) , In: Procs of 10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing . Institute of Electrical and Electronics Engineers (IEEE) , pp. 87-92 , 10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing , Santorini Isl , 7/05/07 . https://doi.org/10.1109/ISORC.2007.56 | |
| dc.identifier.citation | conference | |
| dc.identifier.isbn | 0-7695-2765-5 | |
| dc.identifier.uri | http://hdl.handle.net/2299/6271 | |
| dc.description | “This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.” | |
| dc.description.abstract | Modern processors used in embedded systems are becoming increasingly powerful, having features like caches and pipelines to speedup execution. While execution speed of embedded software is generally increasing, it becomes more and more complex to verify the correct temporal behavior of software, running on this high-end embedded computer systems. To achieve time-predictability the authors introduced a very rigid software execution model with distribution being realized based on the time-triggered communication model. In this paper we analyze the time-predictability of a preempting task-activation, running on a hardware with direct-mapped instruction caches. As one result we analyze why a task-preemption driven by a clock interrupt is not suitable to guarantee time-predictability. As a second result, we present a time-predictable task-preemption driven by an instruction counter. | en |
| dc.format.extent | 6 | |
| dc.format.extent | 126949 | |
| dc.language.iso | eng | |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
| dc.relation.ispartof | In: Procs of 10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing | |
| dc.title | Time-predictable task preemption for real-time systems with direct-mapped instruction cache | en |
| dc.contributor.institution | Centre for Computer Science and Informatics Research | |
| dc.contributor.institution | Department of Computer Science | |
| dc.contributor.institution | School of Physics, Engineering & Computer Science | |
| dc.contributor.institution | Centre for Future Societies Research | |
| rioxxterms.versionofrecord | 10.1109/ISORC.2007.56 | |
| rioxxterms.type | Other | |
| herts.preservation.rarelyaccessed | true | |
