| dc.contributor.author | Yuan, F. | |
| dc.contributor.author | Youssef, M. | |
| dc.contributor.author | Sun, Y. | |
| dc.date.accessioned | 2011-11-21T14:01:02Z | |
| dc.date.available | 2011-11-21T14:01:02Z | |
| dc.date.issued | 2001 | |
| dc.identifier.citation | Yuan , F , Youssef , M & Sun , Y 2001 , Efficient modeling and analysis of clock feed-through and charge injection of switched current circuits . in Procs of the Canadian Conf on Electrical & Computer Engineering 2001 . vol. 1 , Institute of Electrical and Electronics Engineers (IEEE) , pp. 573-578 . https://doi.org/10.1109/CCECE.2001.933747 | |
| dc.identifier.isbn | 0-7803-6715-4 | |
| dc.identifier.other | dspace: 2299/4766 | |
| dc.identifier.uri | http://hdl.handle.net/2299/7044 | |
| dc.description | “This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder." “Copyright IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.” | |
| dc.description.abstract | This paper presents an efficient modeling and frequency domain analysis method for analyzing the effect of the clock feed-through and charge injection in switched current circuits. The effect of clock feed-through is analyzed by modeling the clock signal using two constant voltage sources that are switched periodically. The charge injection is depicted using two impulse charge sources that inject charge into both the source and drain terminals of MOS switches when the devices undergo a ON-OFF transition. In addition, both parasitic capacitances and channel resistance of MOS switches are considered. The analysis is carried out using the approach for periodically switched linear circuits. A computer program has been developed. Simulation results on example circuits are presented. | en |
| dc.format.extent | 441356 | |
| dc.language.iso | eng | |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | |
| dc.relation.ispartof | Procs of the Canadian Conf on Electrical & Computer Engineering 2001 | |
| dc.title | Efficient modeling and analysis of clock feed-through and charge injection of switched current circuits | en |
| dc.contributor.institution | School of Engineering and Technology | |
| dc.contributor.institution | School of Physics, Engineering & Computer Science | |
| dc.contributor.institution | Department of Engineering and Technology | |
| dc.contributor.institution | Centre for Engineering Research | |
| dc.contributor.institution | Communications and Intelligent Systems | |
| rioxxterms.versionofrecord | 10.1109/CCECE.2001.933747 | |
| rioxxterms.type | Other | |
| herts.preservation.rarelyaccessed | true | |
