Fault isolation in nonlinear analog circuits with tolerance using the neural network-based L1-norm
This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage measurements. A neural network-based L1-norm optimization approach is proposed and utilized in locating the most likely faulty elements in nonlinear circuits. The validity of the proposed method is verified by both extensive computer simulations and practical examples. One simulation example is presented in the paper.
Published inProcs IEEE Int Symposium on Circuits & Systems
RelationsSchool of Engineering and Technology
School of Engineering and Computer Science