A Single-Path Chip-Multiprocessor System
Author
Schoeberl, Martin
Puschner, Peter
Kirner, Raimund
Attention
2299/7124
Abstract
In this paper we explore the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.