HARP: a VLIW RISC processor

Findlay, P., Trainis, S.A., Steven, G.B. and Adams, R.G. (1991) HARP: a VLIW RISC processor. In: UNSPECIFIED.
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HARP (The Hatfield Risc Processor) is a reduced instruction set processor being developed at Hatfield Polytechnic, UK. The major aim of the HARP project is to develop a VLIW (Very Long Instruction Word) RISC (Reduced Instruction Set Computer) processor capable of a sustained instruction execution rate in excess of one instruction per cycle by the parallel execution of RISC type instructions.
Item Type Conference or Workshop Item (Other)
Identification Number 10.1109/CMPEUR.1991.257412
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Date Deposited 15 May 2025 16:15
Last Modified 25 Feb 2026 00:05

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