Real-time digital video multiplexer synchronisation implementation with CPLD

Herbland, A. and Sotudeh, R. (2003) Real-time digital video multiplexer synchronisation implementation with CPLD. In: ASIC 2003, Procs 5th Int Conf Vol.2 :. Institute of Electrical and Electronics Engineers (IEEE), pp. 914-917. ISBN 0-7803-7889-X
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Many video applications in security areas such as close circuit television (CCTV) require multiple video channels which must be multiplexed into a single video streanm. The industry can only afford to have a few frames or fields per camera. This paper emphasises on a novel hardware design using an algorithm for synchronising the analogue video inputs. Therefore the proposed multiplexer system is able to achieve a constant stream of 50 digital video fields per second using a CPLD (Complex Programmable Logic Device) for 625/50 video system.
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Date Deposited 15 May 2025 16:16
Last Modified 30 May 2025 23:08

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