Fault isolation in nonlinear analog circuits with tolerance using the neural network-based L1-norm

He, Y. and Sun, Y. (2001) Fault isolation in nonlinear analog circuits with tolerance using the neural network-based L1-norm. In: UNSPECIFIED.

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This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage measurements. A neural network-based L1-norm optimization approach is proposed and utilized in locating the most likely faulty elements in nonlinear circuits. The validity of the proposed method is verified by both extensive computer simulations and practical examples. One simulation example is presented in the paper.

Item Type	Conference or Workshop Item (Other)
Identification Number	10.1109/ISCAS.2001.922372
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Date Deposited	15 May 2025 16:24
Last Modified	25 Feb 2026 00:07