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dc.contributor.authorSharma, Ashok
dc.contributor.authorSun, Yichuang
dc.contributor.authorSimpson, Oluyomi
dc.contributor.authorLauder, David
dc.date.accessioned2021-03-03T12:30:01Z
dc.date.available2021-03-03T12:30:01Z
dc.date.issued2021-02-19
dc.identifier.citationSharma , A , Sun , Y , Simpson , O & Lauder , D 2021 , ' Design and Implementation of a Reconfigurable Wideband Radio Frequency Spectrum Analyzer with Image Rejection in the Digital Domain ' , IEEE Transactions on Instrumentation and Measurement , vol. 70 , 2003416 . https://doi.org/10.1109/TIM.2021.3060578
dc.identifier.issn0018-9456
dc.identifier.urihttp://hdl.handle.net/2299/23997
dc.description© 2021 IEEE. This is the accepted manuscript version of an article which has been published in final form at https://dx.doi.org/10.1109/TIM.2021.3060578
dc.description.abstractMost existing radio frequency (RF) spectrum analyzers use conventional superheterodyne architecture to remove images associated with the down conversion of RF input frequency to some intermediate frequency (IF) for further processing, and their complexity increases as the frequency range of interest is extended. This article describes a novel digital system architecture for spectrum analyzers based on quadrature down conversion. Quadrature down conversion architectures where image responses are inherently rejected are normally used to analyze a single frequency or a very narrow frequency spectrum. This article proposes using quadrature architecture in an ultrawideband spectrum analysis application. A wideband spectrum analyzer receiver with compensation for gain and phase imbalances in the RF input range, as well as compensation for gain and phase imbalances within the IF passband complete with resolution bandwidth (RBW) filtering, video bandwidth (VBW) filtering, and amplitude detection, is implemented in a low-cost field-programmable gate arrays (FPGAs). The proposed method still achieves the desired image rejection performance specification, is power-efficient, and significantly simplifies the RF front-end hardware in comparison to state-of-the-art methods.en
dc.format.extent16
dc.format.extent1107425
dc.language.isoeng
dc.relation.ispartofIEEE Transactions on Instrumentation and Measurement
dc.subjectSpectrum Analyser
dc.subjectRe-configurable
dc.subjectWideband
dc.subjectResolution Bandwidth
dc.subjectFPGA
dc.subjectreconfigurable
dc.subjectresolution bandwidth (RBW)
dc.subjectField-programmable gate array (FPGA)
dc.subjectwideband
dc.subjectspectrum analyzer
dc.subjectElectrical and Electronic Engineering
dc.subjectInstrumentation
dc.titleDesign and Implementation of a Reconfigurable Wideband Radio Frequency Spectrum Analyzer with Image Rejection in the Digital Domainen
dc.contributor.institutionCentre for Engineering Research
dc.contributor.institutionCommunications and Intelligent Systems
dc.contributor.institutionSchool of Physics, Engineering & Computer Science
dc.contributor.institutionDepartment of Engineering and Technology
dc.contributor.institutionSchool of Engineering and Technology
dc.description.statusPeer reviewed
dc.identifier.urlhttp://www.scopus.com/inward/record.url?scp=85101753035&partnerID=8YFLogxK
rioxxterms.versionofrecord10.1109/TIM.2021.3060578
rioxxterms.typeJournal Article/Review
herts.preservation.rarelyaccessedtrue


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