| dc.contributor.author | Steven, F.L. | |
| dc.contributor.author | Adams, R.G. | |
| dc.contributor.author | Steven, G.B. | |
| dc.contributor.author | Wang, L. | |
| dc.contributor.author | Whale, D. | |
| dc.date.accessioned | 2009-07-27T08:33:59Z | |
| dc.date.available | 2009-07-27T08:33:59Z | |
| dc.date.issued | 1993 | |
| dc.identifier.citation | Steven , F L , Adams , R G , Steven , G B , Wang , L & Whale , D 1993 , ' Addressing Mechanisms for VLIW and Superscalar Processors ' , Microprocessing and Microprogramming , vol. 39 , no. 2-5 , pp. 75-78 . https://doi.org/10.1016/0165-6074(93)90060-X | |
| dc.identifier.issn | 0165-6074 | |
| dc.identifier.other | dspace: 2299/3721 | |
| dc.identifier.uri | http://hdl.handle.net/2299/3721 | |
| dc.description | Original article can be found at: http://www.sciencedirect.com/science/journal/01656074 Copyright Elsevier B.V. DOI: 10.1016/0165-6074(93)90060-X [Full text of this article is not available in the UHRA] | |
| dc.description.abstract | RISC processors employ simple addressing modes which allow memory addresses to be calculated in a single processor cycle. This paper demonstrates that VLIW and Superscalar processor performance can be improved by further simplifying the addressing modes. In particular, the distinctive ORed indexing addressing mechanism employed by the HARP VLIW processor boosts performance by 10%. Register indirect addressing on its own yields a similar performance improvement. | en |
| dc.language.iso | eng | |
| dc.relation.ispartof | Microprocessing and Microprogramming | |
| dc.title | Addressing Mechanisms for VLIW and Superscalar Processors | en |
| dc.contributor.institution | School of Computer Science | |
| dc.contributor.institution | Centre for Computer Science and Informatics Research | |
| dc.contributor.institution | School of Physics, Engineering & Computer Science | |
| dc.description.status | Peer reviewed | |
| rioxxterms.versionofrecord | 10.1016/0165-6074(93)90060-X | |
| rioxxterms.type | Journal Article/Review | |
| herts.preservation.rarelyaccessed | true | |
